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1

A Novel 8T Cell-Based Subthreshold Static RAM for Ultra-Low Power Platform Applications

Kim, Taehoon, Manisankar, Sivasundar, Chung, Yeonbae

Journal:

Year:

2020

File:

PDF, 5.20 MB

2020

2

[IEEE 2012 International SoC Design Conference (ISOCC 2012) - Jeju Island, Korea (South) (2012.11.4-2012.11.7)] 2012 International SoC Design Conference (ISOCC) - Design of logic-compatible embedded DRAM using gain memory cell

Weijie Cheng,, Jeong-Wook Cho,, Yeonbae Chung,

Year:

2012

Language:

english

File:

PDF, 395 KB

english, 2012

3

Built-in parasitic-diode-based charge injection technique enhancing data retention of gain cell DRAM

Cheng, Weijie, Chung, Yeonbae, Das, Hritom

Journal:

Electronics Letters

Year:

2015

Language:

english

File:

PDF, 588 KB

english, 2015

4

A COMPACT FERROELECTRIC CAPACITOR MACRO MODEL FOR FRAM CIRCUIT SIMULATION

Kim, Jung-Hyun, Chung, Yeonbae

Journal:

Integrated Ferroelectrics

Year:

2008

Language:

english

File:

PDF, 819 KB

english, 2008

5

Stability and leakage characteristics of novel conducting PMOS based 8T SRAM cell

Journal:

International Journal of Electronics

Year:

2014

Language:

english

File:

PDF, 1.14 MB

english, 2014

6

A 0.4-/spl mu/m 3.3-V 1T1C 4-Mb nonvolatile ferroelectric RAM with fixed bitline reference voltage scheme and data protection circuit

Byung-Gil Jeon, Mun-Kyu Choi, Yoonjong Song, Seung-Kyu Oh, Yeonbae Chung, Kang-Deog Suh, Kinam Kim

Journal:

IEEE Journal of Solid-State Circuits

Year:

2000

Language:

english

File:

PDF, 254 KB

english, 2000

7

[IEEE 2012 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) - Bangkok, Thailand (2012.12.3-2012.12.5)] 2012 IEEE International Conference on Electron Devices and Solid State Circuit (EDSSC) - Stack-transistor based differential 8T SRAM cell for embedded memory applications

Weijie Cheng,, Baolong Zhou,, Huarong Zheng,, Yeonbae Chung,

Year:

2012

Language:

english

File:

PDF, 161 KB

english, 2012

8

CMOS latch bit-cell array for low-power SRAM design

Chung, Yeonbae, Cheng, Weijie

Journal:

IEICE Electronics Express

Year:

2010

Language:

english

File:

PDF, 1.34 MB

english, 2010

9

Bit-area efficient embedded pseudo-SRAM utilising dual-threshold hybrid 2T gain cell

Chung, Yeonbae, Cheng, Weijie

Journal:

IET Circuits Devices & Systems

Year:

2014

Language:

english

File:

PDF, 1.55 MB

english, 2014

10

[Inst. Electr. Eng. Japan International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 - Yokohama, Japan (23-25 May 1995)] Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 - A physically based DMOS transistor model implemented in SPICE for advanced power IC TCAD

Yeonbae Chung,, Burk, D.E.

Year:

1995

Language:

english

File:

PDF, 541 KB

english, 1995

11

[IEEE 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers - San Francisco, CA, USA (7-9 Feb. 2000)] 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056) - A 0.4 μm 3.3 V 1T1C 4 Mb nonvolatile ferroelectric RAM with fixed bit-line reference voltage scheme and data protection circuit

Byung-Gil Jeon,, Mun-Kyu Choi,, Yoonjong Song,, Seung-Kyu Oh,, Yeonbae Chung,, Kang-Deog Suh,, Kinam Kim,

Year:

2000

Language:

english

File:

PDF, 121 KB

english, 2000

12

[IEEE 2007 IEEE Conference on Electron Devices and Solid-State Circuits - Tainan, Taiwan (2007.12.20-2007.12.22)] 2007 IEEE Conference on Electron Devices and Solid-State Circuits - Design of 256-Kb Low-Power Embedded SRAM

Song, Seung-Ho, Kim, Jung-Hyun, Lee, Jung-Chan, Chung, Yeonbae

Year:

2007

Language:

english

File:

PDF, 3.76 MB

english, 2007

13

[IEEE 2008 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) - Hong Kong, China (2008.12.8-2008.12.10)] 2008 IEEE International Conference on Electron Devices and Solid-State Circuits - Power efficient charge pump circuit in standard twin-well CMOS technology

Jung-Chan Lee,, Jin-Young Park,, Yeonbae Chung,

Year:

2008

Language:

english

File:

PDF, 560 KB

english, 2008

14

A 3.3-V, 4-Mb nonvolatile ferroelectric RAM with selectively driven double-pulsed plate read/write-back scheme

Yeonbae Chung, Byung-Gil Jeon, Kang-Deog Suh

Journal:

IEEE Journal of Solid-State Circuits

Year:

2000

Language:

english

File:

PDF, 387 KB

english, 2000

15

[IEEE 2014 International SoC Design Conference (ISOCC) - Jeju (2014.11.3-2014.11.6)] 2014 International SoC Design Conference (ISOCC) - A gain cell based embedded DRAM with fully-restoring write-back scheme

Cheng, Weijie, Das, Hritom, Huarong Zheng,, Baolong Zhou,, Chung, Yeonbae

Year:

2014

Language:

english

File:

PDF, 1.10 MB

english, 2014

16

[IEEE 2017 International Conference on Electron Devices and Solid-State Circuits (EDSSC) - Hsinchu (2017.10.18-2017.10.20)] 2017 International Conference on Electron Devices and Solid-State Circuits (EDSSC) - Read disturb-free SRAM bit-cell for subthreshold memory applications

Kim, Hyunmyoung, Kim, Taehoon, Manisankar, Sivasundar, Chung, Yeonbae

Year:

2017

Language:

english

File:

PDF, 242 KB

english, 2017

17

FRAM design style utilising bit-plate parallel cell architecture

Journal:

Electronics Letters

Year:

2003

Language:

english

File:

PDF, 302 KB

english, 2003

18

[Japan Soc. Appl. Phys 1999 Symposium on VLSI Circuits. Digest of Technical Papers - Kyoto, Japan (17-19 June 1999)] 1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326) - A 3.3-V 4-Mb nonvolatile ferroelectric RAM with a selectively-driven double-pulsed plate read/write-back scheme

Yeonbae Chung,, Mun-Kyu Choi,, Seung-Kyu Oh,, Byung-Gil Jeon,, Kang-Deog Suh,

Year:

1999

Language:

english

File:

PDF, 240 KB

english, 1999

19

[IEEE ICVC'99. 6th International Conference on VLSI and CAD - Seoul, South Korea (26-27 Oct. 1999)] ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361) - A novel cell charge evaluation scheme and test method for 4 Mb nonvolatile ferroelectric RAM

Byung-Gil Jeon,, Moon-Kyu Choi,, Seung-Gyu Oh,, Yeonbae Chung,, Kang-Deog Suh,, Kinam Kim,

Year:

1999

Language:

english

File:

PDF, 251 KB

english, 1999

20

P-channel logic 2 T eDRAM macro with high retention bit architecture

Manisankar, Sivasundar, Chung, Yeonbae

Journal:

International Journal of Circuit Theory and Applications

Year:

2018

Language:

english

File:

PDF, 1.02 MB

english, 2018

21

[IEEE 2007 IEEE Conference on Electron Devices and Solid-State Circuits - Tainan, Taiwan (2007.12.20-2007.12.22)] 2007 IEEE Conference on Electron Devices and Solid-State Circuits - A Low-Voltage Charge Pump Circuit with High Pumping Efficiency in Standard CMOS Logic Process

Park, Jin-Young, Chung, Yeonbae

Year:

2007

Language:

english

File:

PDF, 2.48 MB

english, 2007

22

[IEEE (ICEEE). 1st International Conference on Electrical and Electronics Engineering, 2004. - Acapulco, Mexico (8-10 Sept., 2004)] (ICEEE). 1st International Conference on Electrical and Electronics Engineering, 2004. - A ffigh efficiency FRAM design technique with non-driven plate scheme

Yeonbae Chung,, Sang-Hoon Jung,, Hyun-Wook Park,, Jae-Eun Yoon,, Jung-Hyun Kim,

Year:

2004

Language:

english

File:

PDF, 709 KB

english, 2004

23

Implementation of low-voltage static RAM with enhanced data stability and circuit speed

Yeonbae Chung, Seung-Ho Song

Journal:

Microelectronics Journal

Year:

2009

Language:

english

File:

PDF, 957 KB

english, 2009

24

An Experimental 0.8 V 256-kbit SRAM Macro with Boosted Cell Array Scheme

Chung, Yeonbae, Shim, Sang-Won

Journal:

Year:

2007

File:

PDF, 755 KB

2007

25

PMOS-switching dual-path charge pump in standard twin-well CMOS technology

Lee, Jung-Chan, Chung, Yeonbae

Journal:

International Journal of Electronics

Year:

2010

Language:

english

File:

PDF, 907 KB

english, 2010

26

[IEEE 2003 IEEE Conference on Electron Devices and Solid-State Circuits - Hong Kong, China (16-18 Dec. 2003)] 2003 IEEE Conference on Electron Devices and Solid-State Circuits (IEEE Cat. No.03TH8668) - Ferroelectric memory design based on grounded-plate PMOS-gate cell architecture

Yeonbae Chung,, Jung-Hyun Kim,, Jae-Eun Yoon,

Year:

2003

Language:

english

File:

PDF, 286 KB

english, 2003

27

[IEEE 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT) - Shanghai, China (2010.11.1-2010.11.4)] 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology - Low-power accessless SRAM macro in logic CMOS technology

Ryu, Jae-Ho, Cheng, Weijie, Kim, Yong-Woon, Cho, Jeong-Wook, Chung, Yeonbae

Year:

2010

Language:

english

File:

PDF, 475 KB

english, 2010

28

[IEEE 2014 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) - Chengdu, China (2014.6.18-2014.6.20)] 2014 IEEE International Conference on Electron Devices and Solid-State Circuits - A high-retention 2T embedded DRAM with cell-body toggle scheme

Zheng, Huarong, Zhou, Baolong, Cheng, Weijie, Chung, Yeonbae

Year:

2014

Language:

english

File:

PDF, 663 KB

english, 2014

29

[IEEE 2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) - Singapore, Singapore (2015.6.1-2015.6.4)] 2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) - Experimental N-style two-transistor eDRAM in logic CMOS technology

Das, Hritom, Manisankar, Sivasundar, Cheng, Weijie, Chung, Yeonbae

Year:

2015

File:

PDF, 1.32 MB

2015

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